Introduction to FPGA Part 1 - What is an FPGA? | Digi-Key Electronics

Great Explaination. Thanks m8!

shawn my man once again perfeect video for yet another acadmic topic

The Miniware DS213 mini DSO is built around an FPGA. SUUUUUUUPER cool stuff!

VHDL is inspired by Pascal syntax. Since you mention Verilog is inpired by C, it's a useful addition.

Parabéns... Ótima iniciativa, muito obrigado.

Thank you Shawn for the amazing introduction. Love your videos since your early days at SparkFun. please keep producing more.

The button I need to prepare are 4 pins buttons, right?

I was searching for complete tutorial series for FPGA , got the best one ❤🎉

When you listed the design flow it got really complicated. I was considering getting into FPGA but everywhere I kept seeing dividing opinions on what to focus on. VHDL or SystemVerilog, industry standard vs modern language, C or Python etc.

Geez I’d like to stay with one language but also be within the industry expectations. I still see education programs staying with VHDL and C, instead of C++.

I was gonna try this but i gotta learn a few more things before i get here , I accidentally bought a VHDL book and I dont return books but looking at it I realized i was Still in the STM32 early stages. I get there. Thanks bro.

In college in the late 80's i was involved with a custom processor design implemented in an FPGA. On paper the design was perfect. In the sim it worked perfectly. In hardware nothing worked. It took alot of lab time to figure out that that there was a significant race condition in a subset of the processor that the professor had given us to use. He passed my fix along to everyone else. Moral of the story: Don't trust the sim blindly.

This a really good video cheers mate

You need to use a pocket with pens and a calculator.

Can anybody help me? I'm a beginner and I'm looking for a FPGA board to start with. I don't know which board is the most suitable for me. Nexys A7 is way too expensive. My options for the time being are: Basys 3 artix-7, Arty A7/S7 or Cmod A7/S7 (breadboardable). I need a good price quality ratio. And also I don't know if the breadboardable boards are enough powerful and capable. Are they worth it? Or the extra money for the other boards like Basys and Arty is worth it more? Thank you very much!

Thank you so much!!!

This guy sounds like the lock picking lawyer

For Bitcoin mining is FPGA more efficient than a GPU?

Really a great introduction. Strong work!

Finally found the iCE40 and can't wait to start this course! Thanks Shawn!

Hey there!
I want to go through this course but the stick version of the ICE40 board is out of stock. Could anybody suggest a not so expensive alternative?

My day is not ruined, After All I thought I must build logic gate from scratch with using transistor while I can program it with FPGA

Superbly explained....

I <3 Digi-Key!

Good intro to this stuff. Something a lot of us need to know for the future in CPUs and microcontrollers.

Seems I've been programming FPGAs for years and didn't know it. Software defined radio (SDR) is all FPGA.

Thanks, I learned a lot; clear language, good presentation, I really like what you do here

FPGAs are really great for those interesting in retro-computing or learning how a CPU works. I am implementing Ben Eater's 8-bit computer in an FPGA in a series of videos on my channel for anyone interested. Very cool stuff!

Any thoughts HDL converters, like Silice, Bluespec / chisel-lang HDL , SpinalHDL? Or Migen/nMigen/MiSoC->LiteX... which appears to be a python to HDL converter? FuseSoC IP?

Would love to see
1) APIO multi-fpga-platform toolbox support other hardware (ex. Intel Nios, Microsemi Arm-M4, Quicklogic RIsc-V), JTAG/OpenOCD programmers, etc
2) Tips on setting up a build environment , preferably a Docker Container with all the tools for Lattice, Xilinx, etc
3) an led-blink tutorial that instantiates a FuseSoC IP (ex. ValentyUSB, CPU : LatticeMico32, Microblaze)
4) Synthesizing (SymbiFlow, Yosys ) and Simulating the logic/timing WITH (litescope, SignalTap, Chipscope) and WITHOUT hardware (Renode?, Modelsim)
5) Place-and-Routing and programming (nextpnr, etc)
6) Building, Downloading and Debugging or stepping thru the CPU CODE

how does Shawn knows literally ANYTHING

Digi-key has been around. Helping designers and engineers forever...

What a great video clip which is very useful

Ok so who's writing some ethash mining into one of those sticks?

As a computer engineer I got a lot of HDL and design logic and even microprocessor design experience in classes we used FPGAs but only for specific assignments and simple projects. I have one more class on Modern Processor architecture but I think I am getting to where I could modify a cpu to add specific assembly instructions. I should get my own fpga and play with it so this knowledge doesn’t go to waste lol

RC10GT, as classy as a bow tie!

What's the difference between a microcontroller and a microprocessor?

Clean overview of the how to make a FPGA do what you want it to do

Very good introduction which while explaining the concepts narrows down choices - e.g. use Verilog, use APIO) which facilitates hands on learning. Also, the list of parts needed that is provided, even specifying a USB extension cable, will have you well prepared for gaining the most from this series. Just finished this episode and looking forward to hands on in the next video in the series. Thanks Shawn for an excellent video

👍👍

I would really love to work alongside this series, but sadly the ICE40 FPGA is not available on Digi-Key. At least not in europe...

Well-Done

Clear, concise and informative 👍

🤗🤗

This starts exactly where I needed it to start and goes exactly where I needed it to go

In Verilog start with: `default_nettype none otherwise when you have a typo, Vivado at least maybe other tools too, will create a new signal and assign it 1'b0 aka 0 instead of catching the error. I always had that problem and didn't know about `default_nettype none then one day I walked in a class at the hacker dojo I wasn't enrolled in and the teacher prof guy started with that. When loading a design you can touch the FPGA with your finger to see if it is getting hot which is a sign your IO pads are assigned wrong and fighting. Maybe you let it assign I/O pads automatically so it is trying to drive a ground trace with '1' or something. Xilinx at least so much as I know doesn't allow tri-state buses or latches so everything is clocked (not 100% sure about that) so tristate buses are automatically changed to MUXes.